| Title |
Updated |
Grade |
Popularity |
Size |
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|
 FPGA Generic Library Guide |
2009-04-03 |
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95 |
2532.24 KB |
| Introduction
FPGA Generic library covers a wide range of commonly used digital components to aid the process of building your system-on-FPGA. This library guide describes the components available in the FPGA Generic integrated library.
Compone.. |
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| FPGA_STARTUPx Powerup Delay Unit |
2009-04-03 |
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47 |
156.08 KB |
| In the example circuit above, the Powerup Delay Unit used is the FPGA_STARTUP8. The output of the device has been ORed with the signal from the Test/Reset button on the NanoBoard and wired into the RST inputs of the various blocks within the des.. |
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| FRQCNT2 Frequency Counter |
2009-04-03 |
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35 |
657.97 KB |
| Accessing the Frequency Counter Controls
The host computer is connected to the target Frequency Counter instrument using the IEEE 1149.1 (JTAG) standard interface. This is the physical interface, providing connection to physical pins of the FPG.. |
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| Getting Started with Embedded Software |
2009-04-03 |
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39 |
246.17 KB |
| Adding existing source files to the project
If you have written source files you wish to add to the project:
1. Right-click on the project name in the Projects panel and select Add Existing to Project. The Choose Documents to Add t.. |
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| Getting Started with FPGA Design |
2009-04-03 |
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47 |
514.88 KB |
| When this workflow is completed, you will be able to run the program by flicking on and off the DIP switches on the NanoBoard. To download your Johnson Counter design to the FPGA:
1. Make sure your NanoBoard is properly connected an.. |
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| Getting Started with PCB Design |
2009-04-03 |
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42 |
1503.89 KB |
| To manage the thousands of schematic symbols included with DXP, the Schematic Editor provides powerful library search features. Although the components we require are in the default installed libraries, it is useful to know how to search through.. |
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| Getting Started with Scripting |
2009-04-03 |
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33 |
343.42 KB |
| When you are debugging a script, you can trace the script and watch certain expressions in the debugging window however you cannot edit the script in this debugging window. Close any dialogs displayed by the scripting system, stop this debugger,.. |
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| I Shrunk the Board |
2009-04-03 |
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23 |
105.51 KB |
| By implementing the circuit inside an FPGA you may be able to decrease the component count and complexity of the board to the point where expensive fabrication techniques are not required. Of course the added cost of the FPGA itself may, in some.. |
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| I2CM Controller |
2009-04-03 |
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49 |
147.14 KB |
| Operation
There are two modes of operation with respect to the I2C Controller-Write and Read. These modes are detailed in the following sections.
Write
1. The CPU writes the address of the slave (7 bits) to the WR_DATA_REG. .. |
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| Impedance Controlled Routing |
2009-04-03 |
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27 |
89.73 KB |
| New controls have been added to the routing width design rules. Now you may set a width rule that is different depending on what layer you are on. The major reason designers would want this control is that their boards have high-speed clock sign.. |
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| Implementing a Simple Processor-Based Design in an FPGA |
2009-04-03 |
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90 |
537.94 KB |
| Using the Devices view to program the FPGA
The Devices view (View » Devices) allows you lo follow through the workflow (from left to right) required to send your program to the FPGA. In this view, you can:
• Compi.. |
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| Internal Power and Split Planes |
2009-04-03 |
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150 |
521.26 KB |
| Connecting pads and vias to a power plane________________
Connections to pads and vias are c splayec on a powe- plane accorcng Pie Plane cesign rutes set in the PCSffu'esandCcnsirainfsEd'rorcaog (Design » Rules). You can create acciional .. |
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| Introduction to the Query Language |
2009-04-03 |
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14 |
162.55 KB |
| A filter history list is available through the List panel. Every time you apply a query (correct or not), it is added at the top of this list. So before this list gets overloaded with your own attempts, you should review the sample quenes that h.. |
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| Digital IO Module |
2009-04-03 |
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30 |
431.36 KB |
| These two devices must be placed on the top schematic sheet of the design project - where the instrument symbol(s) themselves are placed - in order for correct communication to the instrument(s) via the JTAG chain. These devices can be found in .. |
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| Keypad Controller |
2009-04-03 |
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40 |
232.73 KB |
| he state of the keypad matrix is returned on the 4-bit COL bus. If a Key has been pressed within a column, the corresponding bit on the bus will be a '0', otherwise the value T will be returned.
If no key has been pressed, all columns will retu.. |
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| LAX_x Logic Analyzer |
2009-04-03 |
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22 |
516.55 KB |
| The maximum supported memory address bus size is 20 bits, allowing the maximum sample buffer size of 1024K.
Whatever size blocK of RAM you use, the value for the memory address bus width must be entered into the Memory Bus Width field, in the L.. |
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| LCD16X2 LCD Controller |
2009-04-03 |
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25 |
177.61 KB |
| The following sections provide information with respect to the Controller's operation, including resetting the device, LCD panel initialization and how to display information on the LCD panel, via the Controller.
Resetting the Controller
When .. |
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| Linking an FPGA Project to a PCB Project |
2009-04-03 |
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23 |
2042.34 KB |
| The lower region of the Projects panel contains all the valid sub-projects that are open in the workspace. This includes FPGA, Embedded and Core projects. For FPGA projects, their defined configurations will also be listed along with constraint .. |
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| Linking from a Company Database to Components in Your Design |
2009-04-03 |
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26 |
965.44 KB |
| 1. Select a Database key field from the drop-down list of column headings found in the database in our 4 Port Serial Interface project example, the Part Number field in the database will be matched with the Part Number paramete.. |
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| Making Electronics Design Easy |
2009-04-03 |
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16 |
188.81 KB |
| The PCB project includes schematic capture across a hierarchy of sheets, components placement from integrated libraries, connectivity with net identrfiers, ERC and simulation, PCB directrves, synchronization with a PCB document, design rules, fo.. |
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| MAX1104 DAC Controller |
2009-04-03 |
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42 |
146.63 KB |
| in the example circuitry above, the MAX1104_DAC Controller takes as input, sine wave data stored in a 64X8 block of ROM. Data is latched into the Controller (into the DATAREG register) on every falling edge of the CLK signal. This data is then s.. |
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| Multi-Channel Design Concepts |
2009-04-03 |
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31 |
117.2 KB |
| DXP introduces a channels.
robust multi-channel design system that even supports channels nested within other
Many designs contain repeated circuitry. One board might duplicate the same section thirty-two times, or perhaps contain four identic.. |
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| NanoBoard Technical Reference Manual - NB1 |
2009-04-03 |
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100 |
8642.26 KB |
| System requirements
Before installing the software, please ensure that your computer meets the minimum system requirements listed below.
Recommended system
To get the most from your Altium design software, we recommend a PC with the following.. |
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| Object Placement and Editing |
2009-04-03 |
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59 |
253.99 KB |
| System requirements
Before installing the software, please ensure that your computer meets the minimum system requirements listed below.
Recommended system
To get the most from your Altium design software, we recommend a PC with the following.. |
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| PC to NanoBoard Communications |
2009-04-03 |
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32 |
489.71 KB |
| The PC to NanoBoard connection
The NanoBoard is connected to your PC via the computer's standard parallel port. When you start the application, the system loads a driver that configures the parallel port to run as a single multiplexed JTAG link.. |
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| Performing Signal Integrity Analyses |
2009-04-03 |
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22 |
801.93 KB |
| With DXP. you can analyze the Signal Integrity performance of a PCB from either the Schematic or the PCB Editors, evaluate net screening results against predefined tests, perform reflection and crosstalK analysis on selected nets and display the.. |
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| Polygon Planes and Copper Pours |
2009-04-03 |
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82 |
329.45 KB |
| A copper plane on a signal layer is a common part of a PCB design This may l>e a hatched ground plane on an analog design, a solid power supply plane for carrying heavy currents, or a solid ground plane for EMC shielding.
Designers requiring.. |
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| Processing the Captured FPGA Design |
2009-04-03 |
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17 |
1858.56 KB |
| Once the task of capturing an FPGA-based design is complete, the next logical step is to process the source files. This involves compilation and synthesis of the design, to obtain a source netlist file for input to relevant vendor place and rout.. |
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| Programming a Xilinx Configuration Device on the Production Board |
2009-04-03 |
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22 |
246.96 KB |
| During design development, the NanoBoard provides the ability to bootstrap the FP6A device located on the currently inserted Daughter Board, at power-up Program download to the FPGA is carried out using dedicated Serial Flash RAM.
When the desi.. |
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| PRTx Parallel Port Unit |
2009-04-03 |
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22 |
192.43 KB |
| The PRTx Parallel Port Unit is simply a register interface for storing data to be transferred to/from another device in a design. For example, when used with a microcontroller such as the TSK80x, which does not have any on-core port interfaces, .. |
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